With the PCB's in and the initial hardware check finished and me delaying far too long on getting back to this project, it was time to move on to verifying that my intended hardware functionality did, in fact, work as planned. There are several functional blocks that need to be tested, both on the AVR … Continue reading Hardware test – 2nd phase
The Z80 SBC PCB's finally arrived. They were shipped only 3 days after the 8052 SBC PCB's but arrived 10 days later. Go figure ... When I was able to sit down and start the build process, I set out to populate and solder a test and development unit. One of the 1st issues I had … Continue reading PCB arrival – initial hardware check
I wired the 74HC299 onto a solderless bread-board along with my TEENSY 2.0++ running AttoBASIC V2.34 and a CD4511 driven 7-segment display connected to the outputs of the 74HC299. [Note: I am the maintainer of AttoBASIC since 2011. Only V2.32 is currently available at this time but V2.34 will be available soon] AttoBASIC makes a great … Continue reading Testing the 74HC299 data bus interface
I have GAL20V8Z's available and the free WinCUPL from ATMEL. I needed five chip selects; UART, PIO, DISK, RAM1 and RAM2. I would like to implement a wait-state generator in case I need to use it at the higher Z80 clock speeds. My first stab at it was a simple I/O decoder splitting the ROM … Continue reading Working on the SPLD to use as an I/O decoder
This page and its entries serves to document my design criteria, goals, progress (and failures) as I start from nothing but a handful of IC's and some ideas about how to implement this "retro-computer".